Construct a 4-bit decimal adder that counts from 0 to 9 in decimal out of D flip-flops, a PLA and a few logic gates. Your circuit should have two inputs R for reset, which resets the counter to 0, and I for increment which adds one to the counter. Adding one to 9 should rap around to 0. The output should be the value of the counter.
0000 -> 0001 -> 0010 -> 0011 -> 0100 -> ... -> 1001 --- ^ | | | -----------------------------------------------------
Assume that an external clock dictates the timing of operations and that the flip-flops are edge-triggered. That is, on a leading edge, if an input (reset or increment) is high, the corresponding action is performed. If the increment input is high for two consecutive clock cycles, then your output should increment twice.
Draw your PLA as in Figure B.7, and be sure to show your work. For instance, you should clearly indicate the boolean formulas computed by the PLA, and give some clue about where the formulas came from. (I.e., A' = AB + ....)
The clock input to your flip flops should be directly connected to the clock, and not (indirectly or directly) to any inputs.