This schedule will be dynamically revised as the course progresses.
The two topics or activities shown for each date correspond approximately to the two halves of the class period with a brief stretching break in between. However, we will divide the time to meet our needs rather than necessarily at the halfway point.
Date | Reading | Topic | Due |
---|---|---|---|
9/2 | Introduction | ||
1.1-1.4 | Computer abstractions and technology | ||
9/4 | 1.5-1.11 | Performance | |
2.4 | Numbers | ||
9/9 | 2.1-2.4 | Instructions, especially arithmetic | |
9/11 | 2.5-2.7 | More instructions | |
2.8-2.9 | Procedures and strings in assembly | ||
9/16 | 2.10-2.12 | More on assembly programming | |
A.1-A.6,A.9 | Assembly programming tools | ||
9/18 | Lab 1: Elementary assembly programming | ||
2.13-2.14 | Assembly programming examples | ||
9/23 | Lab 1 (continued) | ||
2.16-2.20 | Yet more on assembly language | ||
9/25 | Lab 1 (continued) | ||
3.1-3.3 | Arithmetic | ||
9/30 | Lab 2: More advanced assembly programming | Lab 1 | |
3.5-3.6 | Floating point arithmetic | ||
10/2 | Lab 2 (continued) | ||
Review; catch-up | |||
10/7 | No class (attend Nobel Conference); HW rewrites (1-2); take-home 1 out | ||
10/9 | Lab 2 (continued) | ||
B.1-B.3 | Combinational logic | ||
10/14 | Lab 2 (continued) | Take-home test 1 | |
B.7-B.11 | Sequential logic | ||
10/16 | Lab 2 (continued) | ||
4.1-4.3 | A simple datapath | ||
10/23 | 4.4 | A single-cycle processor | Lab 2 |
4.5 | Pipelining | ||
10/28 | 4.6 | Pipelined datapath and control | |
4.10-4.11 | Advanced instruction-level parallelism | ||
10/30 | 5.1-5.3 | Caches | |
5.4 | Cache performance | ||
11/4 | 7.10 | Roofline performance model | |
Pre-lab activity for Lab 3 | |||
11/6 | Lab 3: Memory system performance | ||
5.7 | Virtual memory | ||
11/11 | Lab 3 (continued) | ||
5.6-5.8 | Memory hierarchies and virtual machines | ||
11/13 | Lab 3 (continued) | HW rewrites (3, B,4-5) | |
5.10-5.12 | Review; catch-up; take-home 2 out | ||
11/18 | Lab 3 (continued) | Take-home test 2 | |
5.10 | Cache coherence | ||
11/20 | 6.1-6.5 | Multiprocessors and multithreading | Lab 3 |
discussion of lab 4 | |||
11/25 | Lab 4: Multiprocessor performance | ||
6.6 | SIMD, vector, and graphics processors | ||
12/2 | Lab 4 (continued) | ||
C.1-C.7 | Graphics processing units | ||
12/4 | Lab 4 (continued) | ||
C.8-C.10 | Programming GPUs | ||
12/9 | Lab 4 (continued) | ||
6.8 | Networks | ||
12/11 | . | Lab 4 | |
Review; catch-up; evaluation | HW rewrites (6-7,A) |
Course web site: http://gustavus.edu/~sskulrat/courses/F2014/MCS-284/